1. Field of the Invention
The present invention relates to a mounting structure of an antenna switching circuit of a transceiver.
2. Description of the Related Art
An antenna switching circuit of a transceiver typically includes a first switching diode 33 connected between an input/output terminal 31 connected to an antenna not shown and an output terminal of a transmission circuit 32, a π low-pass filter 35 provided between the input/output terminal 31 and an input terminal of a reception circuit 34, and a second switching diode 36 connected between the input terminal of the reception circuit 34 and a ground, as shown in FIG. 6. The low-pass filter 35 is formed of a first capacitor 35a connected between the input terminal of the reception circuit 34 and the ground, an inductor 35b interposed between the input terminal of the reception circuit 34 and the input/output terminal 31, and a second capacitor 35c connected between the input/output terminal 31 and the ground. A cathode of the first switching diode 33 is connected to an anode of the second switching diode 36 for DC voltage via the inductor 35b. 
In the construction described above, the switching diodes 33 and 36 are turned on in a transmission mode, whereby the ends of the first capacitor 35a are short-circuited with each other by the second switching diode 36 and the input terminal of the reception circuit 34 is shunted to the ground. Accordingly, the inductor 35b and the second capacitor 35c form a parallel resonance circuit having a resonant frequency substantially equal to the frequency of a transmission signal output from the transmission circuit 32. The transmission signal is output to the input/output terminal 31 via the first switching diode 33. At this time, the input terminal of the reception circuit 34 is shunted to the ground, so that the transmission signal is not input to the reception circuit 34.
On the other hand, the switching diodes 33 and 36 are turned off in a reception mode, whereby a reception signal input to the input/output terminal 31 is input to the reception circuit 34 via the low-pass filter 35. Since the first switching circuit 33 is turned off, the reception signal is not input to the transmission circuit 32.
FIG. 7 shows a known mounting structure of the antenna switching circuit constructed as described above. The reception circuit 34 and the transmission circuit 32 described above are provided on an insulating substrate 41. On the insulating substrate 41, an island-like first conductor pattern 41a that serves as the input/output terminal 31, an island-like second conductor pattern 41b connected to the output terminal of the transmission circuit 32, an island-like third conductor pattern 41c connected to the input terminal of the reception circuit 34, and a fourth conductor pattern 41d, disposed in proximity to and opposing the first conductor pattern 41a and the third conductor pattern 41c, connected to a metallic case (not shown) that is grounded, are provided. These conductor patterns are formed, for example, by etching a copper foil deposited on the insulating substrate 41.
Furthermore, the first switching diode 33 is connected between the first conductor pattern 41a and the second conductor pattern 41b, the inductor 35b is connected between the first conductor pattern 41a and the third conductor pattern 41c, the first capacitor 35a and the second switching diode 36 are connected between the third conductor pattern 41c and the fourth conductor pattern 41d, and the second capacitor 35c is connected between the first conductor pattern 41a and the fourth conductor pattern 41d. 
The first and second capacitors 35a and 35c and the inductor 35b are each implemented in the form of what is called a chip component having electrodes for connection on either end thereof. The first and second switching diodes 33 and 36 are each implemented by a resin mold component having connection terminals projecting on either end. Electrodes of the capacitors 35a and 35c and the inductor 35b and terminals of the switching diodes 33 and 36 are connected to the conductor patterns 41a to 41d as shown in FIG. 7, forming the mounting structure of the antenna switching circuit.
In the construction described above, the second switching diode 36 is turned off in a reception mode, forming an equivalent circuit shown in FIG. 8. In FIG. 8, Cj denotes an equivalent capacitance of the PN junction, Lw denotes an equivalent inductance of a bonding wire connecting a P layer or an N layer to a connection terminal, and Ll denotes an equivalent inductance of the connection terminal. The equivalent inductance Ll of the connection terminal is considerably larger than the equivalent inductance Lw of the bonding wire. Cs denotes an equivalent internal stray capacitance, which is connected in parallel to a series circuit of the equivalent junction capacitance Cj and the equivalent inductance Lw of the bonding wire.
In the above equivalent circuit, above a cutoff frequency Fc (approximately 900 MHz) of the low-pass filter 35, a series resonance frequency, and a parallel resonance frequency that is higher than the series resonance frequency, appear due to the presence of the stray capacitance Cs. Furthermore, the series and parallel resonance frequencies are shifted lower by the equivalent inductance Ll of the connection terminal and the capacitance of the first capacitor 35a. Thus, the overall transmission characteristics in relation to the low-pass filter 35 and the switching diode 36 when it is off is such that the series resonance frequency Fs is attenuated and the parallel resonance frequency Fp forms a peak, as shown in FIG. 9. The parallel resonance frequency Fp is calculated, using constants of the equivalent circuit of the second switching diode 36 when it is off, as approximately three times the reception frequency, i.e., approximately 2,700 MHz. Thus, the problem of reception interference has existed due to signals in the vicinity of the parallel resonance frequency Fp entering the reception circuit 34.